Intel's Latest Innovation

Intel recently presented at the VLSI Symposium in Japan, providing an in-depth look at their upcoming Intel 18A process. This new process is scheduled to begin mass production in the second half of 2025. The Intel 18A node combines Gate-All-Around transistors with the PowerVia backside power delivery network, resulting in a revolutionary metal stack architecture. By routing power through the back of the die, Intel has been able to improve yield and simplify fabrication by tightening interconnect pitches on critical layers while relaxing spacing on the top layer.

In standardized tests on an Arm core sub-block, Intel 18A demonstrated approximately 15% higher performance at the same power draw compared to Intel 3. At 1.1 volts, clock speeds can increase by up to 25% without additional energy costs, and at around 0.75 volts, performance can rise by 18%, or power consumption can drop by nearly 40%.

Under the hood, the Intel 18A process features significant cell height reductions, with performance-tuned cells measuring 180 nanometers tall and high-density designs at 160 nanometers. The front-side metal layers have been reduced from 12-19 on Intel 3 to 11-16 on Intel 18A, with three additional rear metal layers added for PowerVia support. Pitches on layers M1 through M10 have been tightened from 60 nanometers to 32 nanometers before easing in the upper layers. Low-NA EUV exposure is used on layers M0 through M4, reducing the number of masks required by 44% and simplifying the manufacturing flow.

Intel plans to introduce the 18A process in its low-power "Panther Lake" compute chiplet and the efficiency-core-only Clearwater Forest Xeon 7 family. Different market segments will be addressed with a cost-optimized 17-layer variant, a balanced 21-layer option, and a performance-focused 22-layer configuration.